0427-7104
2011 Issue 4
The Simulation and Analysis of AIFF MVA LCD Based on Matlab
GUO Hao;XU Jun
GUO Hao;XU Jun
..............page:511-515,520
The Influence of Pixel Size on AIFF MVA Mode Characteristic
ZHANG Min-fu;XU Jun
ZHANG Min-fu;XU Jun
..............page:516-520
Degradation of Rhodamine B by High-Voltage Pulsed Dielectric Barrier Discharge in Liquid-Gas Medium
ZHAO Hai-yang1;LIU Ke-fu1;QIU Jian1;HE Jian2;HOU Hui-qi2
ZHAO Hai-yang1;LIU Ke-fu1;QIU Jian1;HE Jian2;HOU Hui-qi2
..............page:521-526
Acoustic Wave Propagates in Nonuniform Medium Waveguides
TIAN Xiao-pei;JIN Tao
TIAN Xiao-pei;JIN Tao
..............page:527-532
..............page:510
A Clock Calibration Method for EPC Gen2 Tags
YANG Song-chuan1;2;LUO Qia-si1;YU Jun1
YANG Song-chuan1;2;LUO Qia-si1;YU Jun1
..............page:395-401,409
A Differential Reference Used in High-Speed High-Resolution Pipelined ADC
ZHU Yu;LIN Kai-hui;YE Fan;REN Jun-yan
ZHU Yu;LIN Kai-hui;YE Fan;REN Jun-yan
..............page:402-409
A Multi-Mode DAC and Filter Block For Reconfigurable (GSM/TD-SCDMA/WCDMA) Transmitters
HUI Zhi-da;YUAN Yu-dan;GUO Ya-wei;CHENG Xu;ZENG Xiao-yang
HUI Zhi-da;YUAN Yu-dan;GUO Ya-wei;CHENG Xu;ZENG Xiao-yang
..............page:410-416
A Hspice Macromodel for Resistive Switching Memory Cell
CHEN Yi;WANG Ming;ZHANG Ji;JIN Gang;LIN Yin-yin
CHEN Yi;WANG Ming;ZHANG Ji;JIN Gang;LIN Yin-yin
..............page:417-422
..............page:526
..............page:533
A 3D Resistive Switch Memory with Stackable 1TxR Cell
ZHANG Ji;JIN Gang;CHEN Yi;WU Yu-xin;LIN Yin-yin
ZHANG Ji;JIN Gang;CHEN Yi;WU Yu-xin;LIN Yin-yin
..............page:423-429
Application of Household Microwave Presence Detector and Its IC Module Design
HUANG Xiong-chuan;JI Xin-ming;HUANG Yi-ping
HUANG Xiong-chuan;JI Xin-ming;HUANG Yi-ping
..............page:430-434,442
Design of 6.2—9.4 GHz DC-OFDM UWB Receiver RF Front-End
LAN Fei;LI Ning;LI Wei;REN Jun-yan
LAN Fei;LI Ning;LI Wei;REN Jun-yan
..............page:435-442
SRAM Cell Design to Improve Soft Error Tolerance
MIAO Si;WANG Ling-li;CAO Wei;TONG Jia-rong
MIAO Si;WANG Ling-li;CAO Wei;TONG Jia-rong
..............page:443-449
A Low Power 10-bit 50-MS/s Pipelined A/D Converter
ZHOU Wen-jun;ZHANG Ke;LI Wen-hong
ZHOU Wen-jun;ZHANG Ke;LI Wen-hong
..............page:450-456
A New Low Dropout Regulator with High Power Supply Rejection Ratio
HUANG Sheng-zhuan;ZHOU Feng;ZHAO Zhe
HUANG Sheng-zhuan;ZHOU Feng;ZHAO Zhe
..............page:457-461,469
Non-linear Quantization Effect and Its Impact on Phase Noise of Integer-N ALL Digital Phase Locked-Loop
SHEN Jue1;2;JONSSON Fredrik2;ZHENG Li-rong2;YU Jun1;16440 Kista-Stockholm;Sweden)
SHEN Jue1;2;JONSSON Fredrik2;ZHENG Li-rong2;YU Jun1;16440 Kista-Stockholm;Sweden)
..............page:462-469
Design of PLL for Clock Management in FPGA
SONG Jia1;LAI Jin-mei2;WANG Yuan2;ZHENG Guo-xiang1;ZENG Wei1
SONG Jia1;LAI Jin-mei2;WANG Yuan2;ZHENG Guo-xiang1;ZENG Wei1
..............page:470-476
Test and Inquiry of FPGA SEU-Hardening by TMR
HUANG Jin-jie1;2;SUN Peng2;SHEN Ming-jie2;YU Jun1;2
HUANG Jin-jie1;2;SUN Peng2;SHEN Ming-jie2;YU Jun1;2
..............page:477-484
Distributed Power Control Algorithm Considering Node Data Delay in Cognitive Radio Networks
SUN Shun-qiao;WANG Xiang;NI Wei-ming
SUN Shun-qiao;WANG Xiang;NI Wei-ming
..............page:485-491
..............page:492-500
Dynamic Homography Method For Multi-Camera Target Tracking
LIN Qing;FAN Jing-jing;HU Bo
LIN Qing;FAN Jing-jing;HU Bo
..............page:501-510