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Electronics and Packaging
1681-1070
2013 Issue 9
A Wafer Level Reliability Evaluation Method Based on 0.5μm CMOS Process
TU Qizhi;MA Minhui;ZHAO Wenqing
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page:35-39
Assessment of IC Reliability in Long Storage Life Test
GUAN Guangbao;YIN Ying;ZHANG Huibin
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page:40-43
Analysis of Noise in Electrical Design of High-density Ceramic Package
YANG Yibo;DING Rongzheng;GAO Nayan;LI Xinyan
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page:1-5
Dielectric Property of ALD Al2O3 Film and its Application in Silicon Capacitor
CHEN Jie;LI Jun;ZHAO Jinru;LI Xinghe;XU Shenggen
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page:31-34
The Study of Low Power Test Platform for Zigbee Chip
LI Hui;XU Ziming;LIAO Juhua
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page:44-48
Thermal Simulation and Optimization Analysis for BGA
MA Xiaobo;CHEN Shiguang;WANG Xiyou;WEN Lijun
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page:10-13
Study of the Effect of Loop Proifle Parameter on Aluminum Wedge Bonding Strength
LIAO Xiaoping;YANG Bing
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page:14-17
A Design of 32-Bit Fixed-Point DSP Circuit
XUE Haiwei;ZHANG Qingwen;WANG Yueling;XU Xinyu
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page:22-25,30
Package Structure Design of Flip Chip Device
AO Guojun;ZHANG Guohua;JIANG Changshun;ZHANG Jiaxin
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page:6-9,17
Application of Insulated Bonding Wire in the Ceramic Package
YANG Bing;ZHANG Guohua;LI Zongya
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page:18-21
Research on Design of Radiation Hardened Layout for Integrated Circuit in Si Technology
TIAN Haiyan;HU Yongqiang
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page:26-30