Electronics and Packaging 2010 Issue 5 Test Technique Research of Combine Virtual Instrument with ATE

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Electronics and Packaging
1681-1070
2010 Issue 5

Test Technique Research of Combine Virtual Instrument with ATE
chai hai feng ; tao xue feng ; du yuan xun

..............page:14-16

The Design of Comparator for Successive Approximation ADC
xiao pei lei ; hu xiao qin ; li jing chun

..............page:17-21

The Radiation Hardened Layout Design for EEPROM Cell
zhao li ; tian hai yan ; zhou zuo jie

..............page:22-24,29

..............page:11-13

..............page:48

..............page:36-40

A Back-end Design Process for SoC
zhang ling ; luo jing

..............page:25-29

..............page:7-10,29

..............page:33-35

LTCC Microwave Integral Substrate Packaging
dong zhao wen ; li jian hui ; zuo fang qing

..............page:1-6

Introduce of Redundant Technique used in Flash
wang feng ming ; hu kai ; huang cheng

..............page:30-32

xin xi bao dao

..............page:32,41-47