Recent advances in optoelectronic properties and applications of two-dimensional metal chalcogenides
Xia Congxin;Li Jingbo;Department of Physics;Henan Normal University;Institute of Semiconductors;Chinese Academy of Sciences;

..............page:5-13

SnS thin films deposited by chemical bath deposition, dip coating and SILAR techniques
Sunil H.Chaki;Mahesh D.Chaudhary;M.P.Deshpande;P.G.Department of Physics;Sardar Patel University;

..............page:14-22

Photoelectric characteristics of CH₃NH₃PbI₃/p-Si heterojunction
Wu Yamei;Yang Ruixia;Tian Hanmin;Chen Shuai;Hebei University of Technology;Tianjin Key Laboratory of Electronic Materials and Devices;

..............page:23-27

Prospects of gallium nitride double drift region mixed tunneling avalanche transit time diodes for operation in F, Y and THz bands
Pranati Panda;Gananath Dash;Electron Devices Group at the School of Physics;Sambalpur University;

..............page:28-33

A novel sub 20 nm single gate tunnel field effect transistor with intrinsic channel for ultra low power applications
Pranav Kumar Asthana;Yogesh Goswami;Bahniman Ghosh;Department of Electrical Engineering;Indian Institute of Technology Kanpur;Microelectronics Research Center;University of Texas at Austin;

..............page:34-38

Performance analysis of charge plasma based dual electrode tunnel FET
Sunny Anand;S.Intekhab Amin;R.K.Sarin;Department of Electronics and Communication Engineering;Dr.B.R.Ambedkar National Institute of Technology Jalandhar;

..............page:39-46

Improved interfacial and electrical properties of Ge MOS devices with ZrON/GeON dual passivation layer
Yuan Wenyu;Xu Jingping;Liu Lu;Huang Yong;Cheng Zhixiang;School of Optical and Electronic Information;Huazhong University of Science and Technology;

..............page:47-51

Series resistance effect on time zero dielectrics breakdown characteristics of MOSCAP with ultra-thin EOT high-k/metal gate stacks
Xu Hao;Yang Hong;Wang Yanrong;Wang Wenwu;Wan Guangxing;Ren Shangqing;Luo Weichun;Qi Luwei;Zhao Chao;Chen Dapeng;Liu Xinyu;Ye Tianchun;Key Laboratory of Microelectronics Devices & Integrated Technology;Institute of Microelectronics;Chinese Academy of Sciences;

..............page:52-55

An LDMOS with large SOA and low specific on-resistance
Du Wenfang;Lyu Xinjiang;Chen Xingbi;State Key Laboratory of Electronic Thin Films and Integrated Devices of China;University of Electronic Science and Technology of China;

..............page:56-59

Measurement of charge transfer potential barrier in pinned photodiode CMOS image sensors
Cao Chen;Zhang Bing;Wang Junfeng;Wu Longsheng;Xi’an Microelectronics Technology Institute;

..............page:60-64

Novel trench gate field stop IGBT with trench shorted anode
Chen Xudong;Cheng Jianbing;Teng Guobing;Guo Houdong;College of Electronic Science and Engineering;Nanjing University of Posts and Telecommunications;National Application-Specific Integrated Circuit System Engineering Research Center;Southeast University;

..............page:65-68

Endurance characteristics of phase change memory cells
Huo Ruru;Cai Daolin;Bomy Chen;Chen Yifeng;Wang Yuchan;Wang Yueqing;Wei Hongyang;Wang Qing;Xia Yangyang;Gao Dan;Song Zhitang;Shanghai Institute of Micro-System and Information Technology;Shanghai Tech University;

..............page:69-72

DOIND: a technique for leakage reduction in nanoscale domino logic circuits
Ambika Prasad Shah;Vaibhav Neema;Shreeniwas Daulatabad;Electronics & Telecommunication Engineering Department;IET-Devi Ahilya University;Electrical Engineering Department;Indian Institute of Technology;

..............page:73-81

Monolithically integrated enhancement/depletion-mode Al Ga N/Ga N HEMTs SRAM unit and voltage level shifter using fluorine plasma treatment
Chen Yonghe;Zheng Xuefeng;Zhang Jincheng;Ma Xiaohua;Hao Yue;Key Laboratory for Wide Band-Gap Semiconductor Materials and Devices;School of Microelectronics;Xidian University;School of Advanced Materials and Nanotechnology;Xidian University;

..............page:82-87

A 100 MS/s 9 bit 0.43 mW SAR ADC with custom capacitor array
Wang Jingjing;Feng Zemin;Xu Rongjin;Chen Chixiao;Ye Fan;Xu Jun;Ren Junyan;State Key Laboratory of ASIC and System;Fudan University;

..............page:88-93

A 0.1–1.5 GHz, low jitter, area efficient PLL in 55-nm CMOS process
Zhong Bo;Zhu Zhangming;School of Microelectronics;Xidian University;

..............page:94-100

A new curvature compensation technique for CMOS voltage reference using |V_GS| and △V_BE
Li Xuemin;Ye Mao;Zhao Gongyuan;Zhang Yun;Zhao Yiqiang;School of Electronic Information and Engineering;Tianjin University;

..............page:101-107

An 8.12 μW wavelet denoising chip for PPG detection and portable heart rate monitoring in 0.18 μm CMOS
Li Xiang;Zhang Xu;Li Peng;Hu Xiaohui;Chen Hongda;State Key Laboratory on Optoelectronics;Institute of Semiconductors;Chinese Academy of Sciences;National Defence University PLA China;

..............page:108-113

15158A SP6T RF switch based on IBM SOI CMOS technology
Cheng Zhiqun;Yan Guoguo;Ni Wayne;Zhu Dandan;Ni Hannah;Li Jin;Chen Shuai;Liu Guohua;Key Laboratory of RF Circuit and System;Education Ministry;Hangzhou Dianzi University;Hangzhou Canaan Tek Co.;Ltd.;

..............page:114-117

Negative voltage bandgap reference with multilevel curvature compensation technique
Liu Xi;Liu Qian;Jin Xiaoshi;Zhao Yongrui;Jong-Ho Lee;School of Information Science and Engineering;Shenyang University of Technology;North-China Integrated Circuit Design CO.;Ltd;The 13th Research Institute;CETC;School of EECS Eng. and ISRC;Seoul National University;

..............page:118-124

Researching the silicon direct wafer bonding with interfacial SiO₂ layer
Wang Xiaoqing;Yu Yude;Ning Jin;State Key Laboratory of Integrated Optoelectronics;Institute of Semiconductors;Chinese Academy of Sciences;

..............page:125-128