0254-4164
2008 Issue 11
Leakage-Aware Energy-Efficient Scheduling for Fixed-Priority Tasks with Preemption Thresholds
HE Xiao-Chuan;JIA Yan
HE Xiao-Chuan;JIA Yan
..............page:2060-2071
Chip Multiprocessor Execution Model for Soft Error Tolerance
GONG Rui;DAI Kui;WANG Zhi-Ying
GONG Rui;DAI Kui;WANG Zhi-Ying
..............page:2047-2059
A Hardware/Software Method for Heterogeneous Cores Cooperating on Stream Architecture
REN Ju;HE Yi;XUN Chang-Qing;YANG Qian-Ming;WEN Mei;WU Nan;ZHANG Chun-Yuan
REN Ju;HE Yi;XUN Chang-Qing;YANG Qian-Ming;WEN Mei;WU Nan;ZHANG Chun-Yuan
..............page:2038-2046
Research and VLSI Implementation of a Dynamic Virtual Channel Structure with Congestion Awareness Scheme
LAI Ming-Che;WANG Zhi-Ying;GUO Jian-Jun;DAI Kui
LAI Ming-Che;WANG Zhi-Ying;GUO Jian-Jun;DAI Kui
..............page:2026-2037
An Efficient Conflict-Free Parallel Memory Scheme for Image Applications with Multiple Interested Regions
XU Jin-Bo;DOU Yong
XU Jin-Bo;DOU Yong
..............page:2015-2025
Software/Hardware Co-Design for 1-D FFT Optimization on Many-Core Architecture
ZHOU Yong-Bin;ZHANG Jun-Chao;ZHANG Shuai;ZHANG Hao
ZHOU Yong-Bin;ZHANG Jun-Chao;ZHANG Shuai;ZHANG Hao
..............page:2005-2014
Multi-Core Embedded Processor Based on FPGA and Parailelization of SUSAN Algorithm
WANG Jie;ZHANG Shu-Yan;LIU Tao;JI Zhen-Zhou;HU Ming-Zeng
WANG Jie;ZHANG Shu-Yan;LIU Tao;JI Zhen-Zhou;HU Ming-Zeng
..............page:1995-2004
A Metadata-Driven Optimization for Sampling Simulation
YAN Qiang;ZHANG Wei-Hua;LIU Li-Li;ZANG Bin-Yu;ZHU Chuan-Qi
YAN Qiang;ZHANG Wei-Hua;LIU Li-Li;ZANG Bin-Yu;ZHU Chuan-Qi
..............page:1986-1994
Architectural Support and Evaluation of Cilk Language on Many-Core Architectures
LONG Guo-Ping;ZHANG Jun-Chao;FAN Dong-Rui
LONG Guo-Ping;ZHANG Jun-Chao;FAN Dong-Rui
..............page:1975-1985
A MPI Parallel Programming Model for CBEA Based on Hybrid Memory Access Technology
FENG Guo-Fu;DONG Xiao-She;HU Bing;WANG Xu-Hao;WANG En-Dong
FENG Guo-Fu;DONG Xiao-She;HU Bing;WANG Xu-Hao;WANG En-Dong
..............page:1965-1974
Study on Transfer Model of Deployment System for High Performance Server Cluster
XUE Zheng-Hua;DONG Xiao-She;HU Lei-Jun;WU Wei-Guo
XUE Zheng-Hua;DONG Xiao-She;HU Lei-Jun;WU Wei-Guo
..............page:1956-1964
Research on Parallel Computation Model with Memory Hierarchy on Multi-Core Clusters
TU Bi-Bo;ZOU Ming;ZHAN Jian-Feng;ZHAO Xiao-Fang;FAN Jian-Ping
TU Bi-Bo;ZOU Ming;ZHAN Jian-Feng;ZHAO Xiao-Fang;FAN Jian-Ping
..............page:1948-1955
A Weighted Dynamic Shared Cache Partitioning Mechanism for Multi-Threaded Multi-Programmed Workloads
SUO Guang;YANG Xue-Jun
SUO Guang;YANG Xue-Jun
..............page:1938-1947
SAGA: A Stream Attribute Guided Cache Allocation Policy for Microprocessors
CHEN Yu;LIN Jun-Min;QIAO Lin;TANG Zhi-Zhong
CHEN Yu;LIN Jun-Min;QIAO Lin;TANG Zhi-Zhong
..............page:1929-1937
Using Write Mask to Support Hybrid Write-Back and Write-Through Cache Policy on Many-Core Architectures
LIN Wei;YE Xiao-Chun;SONG Feng-Long;ZHANG Hao
LIN Wei;YE Xiao-Chun;SONG Feng-Long;ZHANG Hao
..............page:1918-1928
HybridTCache: Tightly Coupled Hybrid Transactional Memory System to Support Efficient Unbounded Transactions with Strong Isolation
WANG Shao-Gang;WU Dan;PANG Zheng-Bin;YANG Xiao-Dong
WANG Shao-Gang;WU Dan;PANG Zheng-Bin;YANG Xiao-Dong
..............page:1907-1917
Design of Cost-Effective 2-Level Correlation Indirect-Branch Predictor
YUAN Nan;FAN Dong-Rui
YUAN Nan;FAN Dong-Rui
..............page:1898-1906
Instruction Fusion Technology for the MIPS
CHEN Wen-Zhi;JIANG Zhen-Yu;WU Fan
CHEN Wen-Zhi;JIANG Zhen-Yu;WU Fan
..............page:1888-1897
Architecture of PKUnity-SK SoC for UMPC
CHENG Xu;LU Jun-Lin;YI Jiang-Fang;LIU Shu
CHENG Xu;LU Jun-Lin;YI Jiang-Fang;LIU Shu
..............page:1877-1887
ji suan ji ti xi jie gou yan jiu xin jin zhan zhuan ji qian yan
yang xue jun ; liu zhi yong ; zuo yong
yang xue jun ; liu zhi yong ; zuo yong
..............page:1875-1876