Home | Survey | Payment| Talks & Presentations | Job Opportunities
Journals   A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Journal of Computer-Aided Design & Computer Graphics
1003-9775
2001 Issue 6
cmm yong yu ping gu cad ruan jian you xin jin zhan
wang da sheng
..............page:576
Study of CAD Modeling for Reverse Engineering
Ke Ying-lin;XIAO Yao-Xian;LI Jiang-xiong
..............page:570-575
Content-Based Color Signature in Color Image
WANG Wen-hui;WANG Zhan;ZHOU Liang-zhu;WAN Jian-wei
..............page:566-569
Completeness Testing of Dimensioning in Multi-Views Based on Space Coordinate Transformation
JI Yang-Jian;ZHANG Shu-you;TAN Jian-rong
..............page:561-565
A General Surface Development Algorithm Based on Energy Model
WANG Hong;Charlie C L WANG
..............page:556-560
Development of Open Graphic DBMS Based on AutoCAD
GU Jing-Wen;ZHANG Hua;XIE Guang-Hui
..............page:552-555
Discussion About Perspective Transform
NIU Yan
..............page:549-551
Pattern Zoning in Length-Alterable Line-ScanningLaser Rapid Prototyping System
CHEN Hong;CHENG Jun;ZU Jing
..............page:545-548
Vector Quantization Based Shear\|Warped Volume Rendering
Guo Dong;CHENG Qian-Sheng;SUN Xi-Chen
..............page:532-536
A Mobile Agent Based Workflow Management Model
WU Gang;WU Quan-Yuan;Wang Hai-Min
..............page:527-531
Research on Automatic Dimensioning Based on Divide and Conquer Strategy
LU Guo-dong;HUANG Chang-lin;PENG Qun-Sheng
..............page:521-526
Design for Assembly System Under Virtual Environment
GUAN Qiang;LIU Ji-Hong;ZHONG Yi-fang;ZHOU Ji
..............page:514-520
Mating Dimension Inheritance and Testing Based on Assembly Drawing Information
ZHANG Shu You;TAN Jian Rong;PENG Qun Sheng
..............page:509-513
Cluster Analysis for Gear Space Arrangement of Complex Gear Transmission
LU Yi-Ping;CHA Jian-zhong;LI Jian-Yong;E Ming-Cheng
..............page:505-508
An OBDD Method for Analysis of Asynchronous Sequential Circuits
LU Yi;YAO Zhi-Jiang;WEI Dao-Zheng;XIE Yong-Liang
..............page:500-504
Research on Application of OBDD to Test Generation of ombinational Logic Circuits
LU Zong-wei;LIN Zheng-hui;ZHANG Lei
..............page:495-499
VERIS: An Efficient Model Checker for Synchronous VHDL Designs
FAN Yi-Ping;BEI Jin-Song;Bian Ji-nian;XUE Hong-xi;HONG Xian-long
..............page:485-489
Modified Retiming for the Timing Optimization of High Speed Logic Circuits
Shen Dan;LIN Zheng-hui
..............page:481-484